Modern technology is built from layers that continuously interact with one another. At the physical level, electronic devices transform electrical signals into digital information. Digital logic turns that information into computation, while processors, memory and communication interfaces provide the machinery needed to execute instructions and move data. As these components become part of embedded systems, they begin to interact with the physical world through sensors, controllers, actuators and real-time software.
But computation does not exist in isolation. Operating systems coordinate hardware and software, firmware gives specialized machines their behaviour, and communication protocols allow independent systems to exchange information. At the same time, machine learning is moving beyond the cloud into edge and on-device systems, where models must operate within real constraints such as memory, processing power, latency and energy consumption.
PrajnaEdge explores these connections as one continuous technology landscape — and takes them beyond explanation. From computing foundations and embedded systems to intelligent machines and edge AI, ideas can be understood, experimented with, and eventually turned into technology that can be experienced in the real world.
Experiment with intelligence beyond the cloud.
Explore how neural networks learn representations from data before compression and deployment. Future experiments will allow adjusting learning parameters—such as learning rate, epoch counts, and batch sizes—to observe loss trajectories and decision boundaries.
Can this image classifier maintain its intelligence while becoming small enough for the edge?
Run a fully quantized INT8 image-classification model directly on embedded hardware.
Can this image classifier maintain its intelligence while becoming small enough for the edge?
Run a fully quantized INT8 image-classification model directly on embedded hardware.
This experiment investigates preparing a compact INT8 TensorFlow Lite model for direct inference on resource-constrained embedded hardware. The model uses the same CNN architecture as the Edge AI exploration, converted to a full INT8 representation to classify three classes: Apple, Banana, and Orange.
Explore the ideas, systems and connections that shape technology — choose any node to begin your journey.
Practical guides to embedded systems and engineering.
Deploying neural networks and intelligent decision loops on raw silicon targets.
How numbers became reality.
Sensing the world is a passive act. A microcontroller can read an ADC, clocking timing intervals and translating physical temperatures, light levels, or voltages into neat digital variables. But observation alone does not change the physical state of a system. A machine that can only observe is a brain trapped in a jar—fully aware of its environment but powerless to act.
To become purposeful, a machine must eventually influence its surroundings. It needs to drive a speaker cone to vibrate air and generate sound, adjust the speed of a high-torque motor in an industrial conveyor, produce a specific reference voltage to calibrate another sensor, or generate a precise high-frequency carrier wave for radio transmission. Every active control system, from a simple thermostat to a multi-axis surgical robot, requires the ability to write actions back into physical space. Observation must give way to influence.
This requirement defines a symmetrical engineering challenge. In our earlier explorations, we watched the Analog-to-Digital Converter (ADC) carve physical reality into discrete digital states. The ADC took a continuous voltage, sampled it at discrete intervals in time, and rounded it to the nearest binary code on a grid. It was a journey from continuous physics to discrete numbers.
To speak back, the machine must take the reverse journey. It must start with a discrete binary code—a neat integer stored in a CPU register—and translate it back into a continuous physical voltage. This is the domain of the Digital-to-Analog Converter (DAC). Below is a conceptual representation of this symmetry:
Figure 1: While the ADC slices continuous signals into discrete digital numbers, the DAC maps numbers back into physical voltages.
How does a chip translate an abstract binary number into a real physical voltage? At its heart, a DAC is a network of resistors and switches that divide a stable Reference Voltage (VREF) down to a specific fraction.
Consider a simple resistor divider ladder. A binary code represents a set of instructions for a switch matrix. For instance, in a classic R-2R ladder architecture, each bit of the digital input code controls a corresponding physical switch. If a bit is 1, its switch connects a node in the resistor ladder to the Reference Voltage (VREF). If a bit is 0, the switch connects that node to ground. The current splits symmetrically at each R-2R junction. By summing these scaled currents, the DAC generates an output current directly proportional to the digital code, which is then buffered by an operational amplifier to output a clean, stable voltage. The hardware block diagram below illustrates this pipeline:
Figure 2: The internal elements of a DAC: input register, switch matrix, resistor scaling network, and output buffer.
Just as with ADCs, a DAC's precision is governed by its Resolution. Resolution defines the number of discrete steps the DAC can use to construct its output voltage.
- An 8-bit DAC yields 28 = 256 discrete voltage steps. - A 10-bit DAC provides 210 = 1024 steps. - A 12-bit DAC provides 212 = 4096 steps, which is standard for high-quality microcontroller peripherals. - A 16-bit DAC provides 216 = 65,536 steps, used in high-fidelity audio equipment where stepped jaggedness would introduce audible distortion.
The smallest voltage change the DAC can output is called the Least Significant Bit (LSB) size. As resolution increases, the step size shrinks, transforming a coarse, jagged staircase into a smooth line. Below is a comparison of output granularity across resolutions:
Figure 3: High resolution minimizes the quantization step size, allowing the DAC to reconstruct curves with minimal distortion.
A DAC cannot output a voltage larger than the Reference Voltage (VREF) supplied to its core. VREF acts as the physical ruler that calibrates the digital steps. The relationship between the output voltage (VOUT = VREF × Digital Code⁄2N - 1), the digital code, the resolution (N), and VREF is defined as:
VOUT = VREF × Digital Code⁄2N - 1
If VREF is 3.3V, a 12-bit code of 4095 outputs exactly 3.3V, while 2048 outputs 1.65V. If VREF drifts or contains high-frequency electrical noise, that noise couples directly into VOUT = VREF × Digital Code⁄2N - 1—if the ruler expands and contracts, the measurements scale with it. Therefore, a clean, stable, and decoupled reference voltage is vital for analog precision. Below is an illustration of how VREF defines the output scaling boundaries:
Figure 4: Reference voltage dictates both the maximum output range and the individual step size (LSB) of the converter.
To generate a dynamic waveform—such as a smooth audio tone, a linear motor ramp, or a calibration pulse—the CPU writes a continuous stream of digital values to the DAC register in a periodic loop driven by timer interrupts.
For example, to generate a Sine Wave, engineers compute a table of sine values beforehand and load them into memory. Every time a timer overflows, a DMA (Direct Memory Access) channel automatically copies the next value from the table directly into the DAC data register without CPU intervention. By updating the DAC at a high, constant frequency, the discrete steps approximate a continuous curve. The illustrations below depict how different waveforms are constructed by sequencing discrete values:
Figure 5: Building Sine, Triangle, Sawtooth, and Square waveforms by outputting timed sequences of digital codes.
If you look closely at a raw DAC output on an oscilloscope, you will see a stair-step pattern. If this raw voltage is fed directly to a high-frequency speaker, the sharp corners of the steps (which represent high-frequency harmonic distortion) will cause an audible hiss or crackle. How do we turn these steps into a truly smooth curve?
The solution is a Reconstruction Filter. This is a low-pass analog filter placed immediately after the DAC output pin. A simple resistor-capacitor (RC) filter removes the high-frequency transitions (the sharp corners of the steps), leaving only the fundamental low-frequency analog wave. Furthermore, many physical loads (like speaker diaphragms or heavy motor coils) possess natural mechanical or inductive inertia, meaning they cannot react instantly to the steps anyway. They act as natural low-pass filters, integrating the steps into smooth physical movements. Below is a diagram of low-pass reconstruction filtering:
Figure 6: A low-pass filter integrates the sharp steps of the raw DAC output, smoothing it into a continuous analog waveform.
In many embedded systems, dedicated DAC hardware is absent because it requires substantial PCB silicon and pin counts. Instead, engineers often use a timer to generate Pulse-Width Modulation (PWM) signals, mimicking an analog output.
By toggling a digital pin rapidly between 0V and 3.3V at a high frequency (often tens of kilohertz) and adjusting the Duty Cycle (the ratio of HIGH time to the total period), we can represent different voltages. If we pass this PWM stream through a low-pass RC filter, the filter integrates the square pulses, smoothing the high-frequency switching into a steady DC voltage directly proportional to the duty cycle. The diagram below illustrates this integration:
Figure 7: Using high-frequency PWM duty-cycle pulses combined with a low-pass filter to generate an average analog voltage.
While PWM is cheap, simple, and highly efficient for power applications (like driving LEDs or brushless motors), it is an imperfect 'impostor' DAC. It suffers from slow response times (due to filter charging delays) and contains switching ripple noise that is difficult to filter out completely. A true DAC provides a steady, immediate voltage level without switching noise. The comparison below contrasts the two methods:
Figure 8: A true DAC provides clean, instantaneous voltage steps, whereas a filtered PWM introduces exponential rise delays and ripple noise.
Let's observe these conversion behaviors. In the interactive panel below, modify reference voltage, DAC resolution, and digital input codes to watch how digital values translate into analog voltages on a meter.
How does sequence timing and low-pass filtering shape the output waveform? In the simulator below, adjust the waveform type, update rate, resolution, and low-pass reconstruction filter cutoff to see how a continuous curve is painted.
DACs are the expressive voice of microcontrollers. They drive audio amplifiers in smart speakers, generate control voltages in industrial loops (like proportional valves), produce high-frequency diagnostic test signals in lab instruments, calibrate medical pacemakers, and execute motor speed profiling in robotics. By giving digital systems a path to write back to the physical world, the DAC completes the handshake between computational logic and physical reality.
Timers taught machines when to pay attention. ADCs taught machines how to translate reality into digital coordinates. DACs taught machines how to write numbers back into physical reality.
For the first time, a machine could not only understand its environment, but actively influence it. Yet as these sensory and output capabilities expanded, a new system challenge emerged. Managing high-speed sampling, responding, keeping time, and communicating all at once required synchronized scheduling. The next engineering frontier was no longer sensing or speaking—it was scheduling what deserved the processor's attention next.
PrajnaEdge is a technology company exploring the space between understanding technology, experimenting with ideas, and turning them into things that can be experienced.
PrajnaEdge began with Embedded Systems — exploring the foundations that connect hardware, software and intelligent computation.
The first technology universe is built around that foundation. The journey will expand as new ideas, experiments and products emerge.
PrajnaEdge is a technology company created by Devaharsha Meesarapu.
I am the engineer behind the design, development, and content of PrajnaEdge. I build low-level systems where code directly controls hardware, bridging the gap between register-level silicon behavior and intelligent edge decision loops.
I am an Embedded Firmware Engineer focused on developing software for resource-constrained systems. My experience spans bare-metal firmware, device drivers, microcontroller peripherals, and communication protocols, working across the boundary between hardware and software.
My work has involved microcontroller-based systems, real-time behaviour, hardware interfaces, and communication technologies such as CAN, CAN FD, UART, SPI, and I²C. I am particularly interested in understanding systems from the lowest level upward—from registers and peripherals to intelligent edge systems.
Engineering is not just about writing code; it is about managing constraints, timings, and physical hardware characteristics. True mastery of complex systems comes from understanding the interactions across different layers of the stack.
This conviction is why I built PrajnaEdge—to bridge the gap between conceptual theory and direct, register-level physical reality.
Software that runs directly on hardware without an operating system.
"Every embedded application begins long before main()."
An Operating System manages hardware and software resources so complex applications can work efficiently.
"When one loop is no longer enough to carry the burden."
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